Samsung is reportedly planning to make a significant change to its Exynos chipsets to improve their performance and efficiency. According to a new rumor, the company plans to use Fan-out Wafer Level Packaging (FoWLP) for its upcoming Exynos 2400 chipset. This packaging method is expected to make the Exynos 2400 smaller, more powerful, and more power-efficient than its predecessors.

Samsung Exynos

FoWLP is a method used to enclose all integrated circuits in a package that also protects the die and connects the chipset to the motherboard. This method allows for a higher integration level in a smaller package footprint, resulting in significantly improved thermal and electrical performance. If Samsung uses FoWLP to make the Exynos 2400, the chipset is expected to be at par with its Snapdragon counterparts in terms of optimization and power efficiency.

The Exynos 2400 is rumored to have a 1+2+3+4 design with one Cortex-X4 core clocked at 3.1GHz, two Cortex-A720 cores clocked at 2.9GHz, three Cortex-A720 cores clocked at 2.6GHz, and four Cortex-A520 cores clocked at 1.8GHz. The chipset will also use an RDNA2 GPU called Xclipse X940 (tentatively), which includes 6 WGP (12 CU), 8 MB L3 cache, and supports hardware-level ray tracing.

While Samsung has not officially acknowledged the existence of the Exynos 2400, rumors suggest that it could be used in the upcoming Galaxy S24. If Samsung can deliver a significantly better Exynos-powered variant through further optimization of other components and software, this could be a game-changer for the company. However, it’s worth noting that this is all speculation at this point, and we’ll have to wait for more industry leaks to confirm any of these rumors.

RELATED:

(Source, Via)

RELATED ARTICLESMORE FROM AUTHOR