Advertisement
Samsung 1.4nm Exynos processor

Samsung’s cutting-edge 1.4nm node takes a big step forward as the company begins its early testing on the upcoming Exynos chipset. The upcoming Exynos chip in question will reportedly have higher peak clock speeds and a massive 96MB of System Level Cache (SLC), along with many notable upgrades.

Since Samsung’s more focused on improving the yield stability of its 2nm process, we’ll see a couple more iterations of the 2nm GAA process before the 1.4nm process enters mass production. That also means the 1.4nm Exynos chip under testing is unlikely to be the unreleased Exynos 2700. Regardless, the early details of this 1.4nm Exynos chip, shared by @SPYGO19726, look promising.

The chip will have a 10-core CPU cluster divided into a ‘2+4+4’ configuration. The two prime cores achieve a maximum speed of 4.50GHz, while the current Exynos 2600 peaks at 3.8GHz. That’s a solid 19% jump in the peak speed. Further, the four performance cores operate at 3.80GHz, and the four efficiency cores run at 2.00GHz.

Details of next-gen Exynos chip fabricated using 1.4nm node

Perhaps the most exciting development of this Exynos chip is the integration of 96MB of SLC cache. The tipster also reports an ultra-wide bus width to minimize latency between the CPU cores and the GPU. A large SLC can store much more frequently used data to achieve a lower memory latency and a boost in bandwidth. This effectively reduces the need for components such as CPU, GPU, NPU, and ISP to remain active all the time to send information to the larger cache.

Also read:
1. TSMC ramps up 2nm production capacity with five fabs, targeting a major leap over 3nm capacity
2. TSMC’s 2nm supply shortage forces smartphone brands to save the best for top-end models amid growing DRAM crisis

Unfortunately, it’s more expensive to produce chipsets with a large SLC cache because it occupies a significant portion of the silicon die. And with larger dies, production costs also go up. It’s important to note that 10MB is the highest SLC cache in smartphone chips, found in the Dimensity 9500. Bumping it to 96MB would result in a die size incompatible with smartphone form factors. However, it can be used in many other device categories.

With Samsung targeting 2029 for the mass production of its 1.4nm node, there’s still plenty of time for development and optimizations. Therefore, it’s best to treat these early details with a grain of salt. Consequently, while these early specifications are exciting, it’s best to treat them with a grain of salt.

We’ll keep you updated with the latest details in our News section. You can visit the page regularly to stay updated. Or join our Telegram channel to receive instant alerts as we post new stories.

Comments